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  ? semiconductor components industries, llc, 2000 december, 2000 rev. 2 1 publication order number: mc74lcx16374/d mc74lcx16374 low-voltage cmos 16-bit d-type flip-flop with 5 vtolerant inputs and outputs (3state, noninverting) the mc74lcx16374 is a high performance, noninverting 16bit dtype flipflop operating from a 2.3 to 3.6 v supply. the device is byte controlled. each byte has separate output enable and clock pulse inputs. these control pins can be tied together for full 16bit operation. high impedance ttl compatible inputs significantly reduce current loading to input drivers while ttl compatible outputs offer improved switching noise performance. a v i specification of 5.5 v allows mc74lcx16374 inputs to be safely driven from 5 v devices. the mc74lcx16374 consists of 16 edgetriggered flipflops with individual dtype inputs and 5 vtolerant 3state true outputs. the buffered clocks (cpn) and buffered output enables (oen ) are common to all flipflops within the respective byte. the flipflops will store the state of individual d inputs that meet the setup and hold time requirements on the lowtohigh clock (cp) transition. with the oe low, the contents of the flipflops are available at the outputs. when the oe is high, the outputs go to the high impedance state. the oe input level does not affect the operation of the flipflops. ? designed for 2.3 to 3.6 v v cc operation ? 6.2 ns maximum t pd ? 5 v tolerant e interface capability with 5 v ttl logic ? supports live insertion and withdrawal ? i off specification guarantees high impedance when v cc = 0 v ? lvttl compatible ? lvcmos compatible ? 24 ma balanced output sink and source capability ? near zero static supply current in all three logic states (20 m a) substantially reduces system power requirements ? latchup performance exceeds 500 ma ? esd performance: human body model >2000 v; machine model >200 v http://onsemi.com marking diagram device package shipping ordering information mc74lcx16374dt tssop48 39 units/rail mc74lcx16374dtr2 tssop48 2500 units/reel tssop48 dt suffix case 120101 1 48 a = assembly location wl = wafer lot yy = year ww = work week 1 48 lcx16374dt awlyyww
mc74lcx16374 http://onsemi.com 2 48 1 cp1 oe1 47 2 d0 o0 46 3 d1 o1 45 4 gnd gnd 44 5d2 o2 43 6 d3 o3 42 7 v cc v cc 41 8 d4 o4 40 9 d5 o5 39 10 gnd gnd 38 11 d6 o6 37 12 d7 o7 36 13 d8 o8 35 14 d9 o9 34 15 gnd gnd 33 16 d10 o10 32 17 d11 o11 31 18 v cc v cc 30 19 d12 o12 29 20 d13 o13 28 21 gnd gnd 27 22 d14 o14 26 23 d15 o15 25 24 cp2 oe2 o0 d0 o1 d1 o2 d2 o3 d3 o4 d4 o5 d5 o6 d6 o7 d7 ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d cp1 oe1 o8 d8 o9 d9 o10 d10 o11 d11 o12 d12 o13 d13 o14 d14 o15 d15 ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d cp2 oe2 1 48 24 25 2 47 3 46 5 44 6 43 8 41 9 40 11 38 12 37 13 36 14 35 16 33 17 32 19 30 20 29 22 27 23 26 pin names function output enable inputs clock pulse inputs inputs outputs pins oen cpn d0d15 o0o15 figure 1. pinout: 48lead (top view) figure 2. logic diagram truth table inputs outputs inputs outputs cp1 oe1 d0:7 o0:7 cp2 oe2 d8:15 o8:15 l h h l h h l l l l l l l l x o0 l l x o0 x h x z x h x z h = high voltage level; l = low voltage level; z = high impedance state; = lowtohigh transition; x = high or low voltage level and transitions are acceptable, for i cc reasons, do not float inputs
mc74lcx16374 http://onsemi.com 3 absolute maximum ratings* symbol parameter value condition unit v cc dc supply voltage 0.5 to +7.0 v v i dc input voltage 0.5 v i +7.0 v v o dc output voltage 0.5 v o +7.0 output in 3state v 0.5 v o v cc + 0.5 output in high or low state. (note 1.) v i ik dc input diode current 50 v i < gnd ma i ok dc output diode current 50 v o < gnd ma +50 v o > v cc ma i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range 65 to +150 c * absolute maximum continuous ratings are those values beyond which damage to the device may occur. exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolutemaximumrated co nditions is not implied. 1. i o absolute maximum rating must be observed. recommended operating conditions symbol parameter min typ max unit v cc supply voltage operating data retention only 2.0 1.5 2.5, 3.3 2.5, 3.3 3.6 3.6 v v i input voltage 0 5.5 v v o output voltage (high or low state) (3state) 0 0 v cc 5.5 v i oh high level output current v cc = 3.0 v 3.6 v v cc = 2.7 v 3.0 v v cc = 2.3 v 2.7 v 24 12 8 ma i ol low level output current v cc = 3.0 v 3.6 v v cc = 2.7 v 3.0 v v cc = 2.3 v 2.7 v + 24 + 12 + 8 ma t a operating freeair temperature 40 +85 c d t/ d v input transition rise or fall rate, v in from 0.8 v to 2.0 v, v cc = 3.0 v 0 10 ns/v
mc74lcx16374 http://onsemi.com 4 dc electrical characteristics t a = 40 c to +85 c symbol characteristic condition min max unit v ih high level input voltage (note 2.) 2.3 v v cc 2.7 v 1.7 v ih g( ) 2.7 v v cc 3.6 v 2.0 v il low level input voltage (note 2.) 2.3 v v cc 2.7 v 0.7 v il g( ) 2.7 v v cc 3.6 v 0.8 v oh high level output voltage 2.3 v v cc 3.6 v; i ol = 100 m a v cc 0.2 v oh g v cc = 2.3 v; i oh = 8 ma 1.8 v cc = 2.7 v; i oh = 12 ma 2.2 v cc = 3.0 v; i oh = 18 ma 2.4 v cc = 3.0 v; i oh = 24 ma 2.2 v ol low level output voltage 2.3 v v cc 3.6 v; i ol = 100 m a 0.2 v ol g v cc = 2.3 v; i ol = 8 ma 0.6 v cc = 2.7 v; i ol = 12 ma 0.4 v cc = 3.0 v; i ol = 16 ma 0.4 v cc = 3.0 v; i ol = 24 ma 0.55 i i input leakage current 2.3 v v cc 3.6 v; 0 v v i 5.5 v 5.0 m a i oz 3state output current 2.3 v cc 3.6 v; 0v v o 5.5 v; v i = v ih or v il 5.0 m a i off poweroff leakage current v cc = 0 v; v i or v o = 5.5 v 10 m a i cc quiescent supply current 2.3 v cc 3.6 v; v i = gnd or v cc 20 m a cc y 2.3 v cc 3.6 v; 3.6 v i or v o 5.5 v 20 m a d i cc increase in i cc per input 2.3 v cc 3.6 v; v ih = v cc 0.6 v 500 m a 2. these values of v i are used to test dc electrical characteristics only. ac characteristics t r = t f = 2.5 ns; c l = 50 pf; r l = 500 w limits unit t a = 40 c to +85 c v cc = 3.3 v 0.3 v v cc = 2.7 v v cc = 2.5 v 0.2 v c l = 50 pf c l = 50 pf c l = 30 pf symbol parameter waveform min max min max min max f max clock pulse frequency 1 170 mhz t plh t phl propagation delay cp to o n 1 1.5 1.5 6.2 6.2 1.5 1.5 6.5 6.5 1.5 1.5 7.4 7.4 ns t pzh t pzl output enable time to high and low level 2 1.5 1.5 6.1 6.1 1.5 1.5 6.3 6.3 1.5 1.5 7.9 7.9 ns t phz t plz output disable time from high and low level 2 1.5 1.5 6.0 6.0 1.5 1.5 6.2 6.2 1.5 1.5 7.2 7.2 ns t s setup t ime, high or low d n to cp 1 2.5 2.5 3.0 ns t h hold time, high or low d n to cp 1 1.5 1.5 2.0 ns t w cp pulse width, high 3 3.0 3.0 3.5 ns t oshl t oslh outputtooutput skew (note 3.) 1.0 1.0 ns 3. skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same d evice. the specification applies to any outputs switching in the same direction, either hightolow (t oshl ) or lowtohigh (t oslh ); parameter guaranteed by design.
mc74lcx16374 http://onsemi.com 5 dynamic switching characteristics t a = +25 c symbol characteristic condition min typ max unit v olp dynamic low peak voltage (note 4.) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc =2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v 0.8 0.6 v v v olv dynamic low valley voltage (note 4.) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc =2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v 0.8 0.6 v v 4. number of outputs defined as ano. measured with an1o outputs switching from hightolow or lowtohigh. the remaining output is measured in the low state. capacitive characteristics symbol parameter condition typical unit c in input capacitance v cc = 3.3 v, v i = 0 v or v cc 7 pf c out output capacitance v cc = 3.3 v, v i = 0 v or v cc 8 pf c pd power dissipation capacitance 10 mhz, v cc = 3.3 v, v i = 0 v or v cc 20 pf waveform 3 pulse width t r = t f = 2.5 ns (or fast as required) from 10% to 90%; output requirements: v ol 0.8 v, v oh 2.0 v v cc 0 v v cc 0 v vmi vmo t w vmi vmo t w waveform 2 output enable and disable times t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns v cc 0 v oen on t pzh t phz t pzl t plz on vmo vmo vmi v oh v hz vmi cpn cpn waveform 1 propagation delays, setup and hold times t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns v cc 0 v dn cpn vmi on v cc 0 v v oh v ol t plh , t phl t h t s vmo vmo f max v ol v hz symbol v cc 3.3 v 0.3 v 2.7 v 2.5 v 0.2 v vmi 1.5 v 1.5 v v cc /2 vmo 1.5 v 1.5 v v cc /2 v hz v ol + 0.3 v v ol + 0.3 v v ol + 0.15 v v lz v oh 0.3 v v oh 0.3 v v oh 0.15 v figure 3. ac waveforms
mc74lcx16374 http://onsemi.com 6 open pulse generator r t dut v cc r l r 1 c l 6v or v cc 2 gnd test switch t plh , t phl open t pzl , t plz 6v at v cc = 3.3  0.3 v 6v at v cc = 2.5  0.2 v open collector/drain t plh and t phl 6v t pzh , t phz gnd c l = 50 pf at v cc = 3.3  0.3 v or equivalent (includes jig and probe capacitance) c l = 30 pf at v cc = 2.5  0.2 v or equivalent (includes jig and probe capacitance) r l = r 1 = 500 w or equivalent r t = z out of pulse generator (typically 50 w ) figure 4. test circuit
mc74lcx16374 http://onsemi.com 7 package dimensions tssop48 dt suffix case 120101 issue a scale 2:1 ??? ??? ??? s u m 0.12 (0.005) v s t s u m 0.254 (0.010) t v b a l k u 48x ref pin 1 ident. 124 25 48 0.076 (0.003) seating d t plane dim min max min max inches millimeters a 12.40 12.60 0.488 0.496 b 6.00 6.20 0.236 0.244 c --- 1.10 --- 0.043 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.50 bsc 0.0197 bsc h 0.37 --- 0.015 --- j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.17 0.27 0.007 0.011 k1 0.17 0.23 0.007 0.009 l 7.95 8.25 0.313 0.325 m 0 8 0 8  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 5. terminal numbers are shown for reference only. 6. dimensions a and b are to be determined at datum plane -w-. c g h w detail e j k1 k j1 section nn m 0.25 (0.010) f detail e n n
mc74lcx16374 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74lcx16374/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland


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